The solution most commonly implemented to produce a reconstituted wafer consists firstly in slicing wafers on which chips have been fabricated to obtain individual chips, a wafer producing mutually identical chips of a first type, another wafer producing chips of another type, etc. The term chip refers to an active electronic component such as a bare chip or a passive component (capacitors, resistors, transformers or inductors, etc.) or a MEMS, the acronym standing for “Micro Electro Mechanical System”. Generally, these chips are then selected after having been tested and often termed “Known Good Die”.
The various types of chips 1 tested, which exhibit connection pads 14 on a face termed the active face or front face, are then picked up and positioned front face on an adhesive support 13 as shown in FIG. 2a, by means for example of a “pick-and-place” machine so as to form generally mutually similar patterns of chips. The term pattern of chips designates a group of various chips intended to form an electronic element.
This adhesive support 13 is typically a tacky skin, itself stuck to a rigid support. Next the chips are encapsulated in a polymer resin 12 of epoxy type so as to bind them.
A redistribution layer or RDL, the acronym standing for “ReDistribution Layer”, optionally with several stages, is thereafter formed on the front face side, after removal of the adhesive support 13 and of the tacky skin; this RDL layer which comprises tracks made of TiW/Cu or TiPd/Au for example, is formed on a dielectric layer 11 deposited in place of the adhesive support, by dipping or by centrifugation, and which is represented in FIGS. 3, 4 and 5. The wafer thus reconstituted which does not comprise any defective chips can then be sliced to obtain plastic micro packages; it can also be stacked on other reconstituted wafers, and connected electrically to these wafers according to various known methods, the stack thereafter being sliced to obtain three-dimensional or 3D electronic modules.
The encapsulation of the chips comprises:                a step of depositing the resin (by so-called compression casting or molding), around and optionally on the chips stuck on the adhesive support, so as to fill the inter-chip spaces,        a step of polymerizing the resin so as to harden it and thus form a rigid and manipulatable substrate in which the chips are fixed, it then being possible for the adhesive substrate to be removed.        
An evident drawback is the displacement of the chips during the deposition of the resin and/or during its polymerization, the pads of the chips then no longer coinciding with the tracks of the redistribution layer (RDL layer). The micro displacements of the chips with respect to the envisaged position, illustrated in FIG. 1, are due to:                the inaccuracy of positioning of the chips on the adhesive support, which is of the order of 5 μm with recent “pick-and-place” equipment operating at high speed,        the reversible but very high expansion of the adhesive support in the vicinity of 100 ppm/° C., illustrated by the arrows C,        the irreversible shrinkage of the resin during the polymerization of the order of a few 1000 ppm/° C., illustrated by the arrows A,        the reversible expansion of the resin after polymerization of about 16 to 17 ppm/° C., illustrated by the arrows B.        
This results in more or less isotropic and unforeseeable micro displacements, typically of between a few μm and a few tens of μm, this possibly exceeding the positioning (with respect to the RDL layer) tolerances required after molding, which are typically of the order of 10 μm.
A solution consists in studying and recording these micro displacements beforehand and then in anticipating them during the positioning of the chips when they are overlaid onto the adhesive support. One of the limits of this technique stems from the fact that the micro displacements are not all foreseeable, notably those of the various types of chips within one and the same pattern.
Another existing solution consists in laying on the adhesive support a copper lattice with rectangular mesh cells of larger dimensions than the chip of about 1 to 1.5 mm, and then in overlaying the chips onto the support in the cavities situated between the criss-crossed bars of the lattice; this lattice is thus used as template in which the chips are placed and makes it possible to limit the volume of resin surrounding the chip and therefore to locally limit the shrinkage after polymerization. This method makes it possible to reduce the expansion and therefore the displacement of the chips but does not make it possible to eliminate it since this does not resolve the problem of the tacky skin which likewise moves. In all cases, the masks making it possible to produce the redistribution layers are corrected. After the production of the first 3 or 4 wafers, the measurements of drift of the chips are performed and the masks are corrected accordingly. Thereafter, it is necessary that the drifts always be identical and reproducible. It furthermore exhibits the following drawbacks:                the lattice necessarily remains in the final package since once molded in the resin, it can no longer be removed,        this limits the number of chips on the wafer on account of the significant space taken up by the lattice,        this requires double slicing to eliminate the bars of the lattice,        the correction of the masks and therefore of the position of the conducting tracks of the redistribution layers can impede the subsequent stacking of the reconstituted wafers which require a rigorously constant spacing by construction.        
It is also known to correct at one and the same time the position of the chips when overlaying the latter onto the tacky skin by modifying the placement spacing on the “Pick and Place” machines, and the masks used for the RDL. For the most critical cases, chip-by-chip irradiation is carried out, this being very expensive and not making it possible to guarantee the spacing for the stacking steps.
The applicant has described a solution in patent application WO2010/102996. It is based on the use of a grid not around the chips but on the chips so as to fix the latter in a fixed and non-modifiable “position” before the steps of molding followed by polymerization. A provisional grid of copper for example is stuck at ambient temperature onto the whole of the rear faces of the chips. After polymerization at ambient temperature or under ultraviolet for the so-called UV adhesives, the casting and the polymerization can be performed without displacement of the chips. The copper grid is thereafter dissolved chemically or the whole of the rear face of the reconstituted wafer is abraded mechanically. The only drawbacks of this technique are due to the fact that additional steps of sticking and of destroying the provisional grid are necessary.